/* 
   ADC.C
   simple driver for LTC1298 interfaced with LPT. Test with free compiler
   Pacific C for MSDOS v7.51.

   Copyright(C) 2004 W.SIRICHOTE

   signal at DB25
   
   D0(2)  DIN
   D1(3)  CLK
   D2(4)  CS

   PE(12) DOUT

   18-25  GND 

*/


#include <stdio.h>
#include <conio.h>
#include <stdlib.h>
#include <dos.h>

#define LPT 0x378
#define status 0x379
#define control 0x37A


#define DIN 1
#define DOUT 0x20
#define CLK 2
#define CS 4

char port_data;


void delay(int n)
{
	int j;
	for(j=0; xj<n; j++)
	continue;
}	

void delay_us(unsigned int n)
{
	unsigned int j;
	for(j=0; j<n; j++)
	delay(100);
}


void init_ADC(void)
{
	outp(LPT,port_data|=CS);	 // make CS to logic high
}
   	
int read_ADC(char n)
{
	int k;
	char i,channel;
	k=0;

    outp(LPT,port_data&=~CS); // make CS low

	delay(10);
	
	if(n==0) channel= 0x0d;
	else channel= 0x0f;

// send config nibble 
     for(i=0; i<4; i++)
	{
         outp(LPT,port_data&=~CLK); // make clk low
	     delay_us(10);
		  
		 if(channel&0x8) outp(LPT,port_data|=DIN);
		 else outp(LPT,port_data&=~DIN);
		 
		 outp(LPT,port_data|=CLK); // make clk high
		 delay_us(10);
		 
		 channel <<=1;
	    
	}

	  
         outp(LPT,port_data&=~CLK); // make clk low
         delay(100);
// now read 12-bit data
    for(i=0; i<12; i++)
	{
	        k<<=1;
		outp(LPT,port_data|=CLK); // make clk high
		delay_us(10);
		outp(LPT,port_data&=~CLK); // make clk low
		delay_us(10);
		
		if(inp(status)&DOUT) k |=1;
		else k &= ~1;
		
	}

	    outp(LPT,port_data|=CS); // make CS high
	    

	return k&=0xfff ;
}


void main(void)
{ 
  port_data = 0x80;
  init_ADC();
 
    while(read_ADC(0) <4090)
    {
     printf("\n ADC0 = %d ADC(1) = %d",read_ADC(0), read_ADC(1));
     delay(1000);
    }
}